AMD’s new FPGAs deliver high bandwidth, real-time performance and broad connectivity for industrial, test and broadcast systems, with programmable behaviour and long-term reliability.
The new AMD Kintex UltraScale+ Gen 2 FPGA family of mid-range FPGAs are built to power systems that rely on high memory, I/O and security performance to meet the evolving demands of imaging, test and measurement, industrial automation and professional 4K/8K media workflows. The data-intensive workloads found in today’s broadcast, test, industrial and medical markets now have system requirements that continue to grow more complex.
For example, for dense 4K/8K media workflows, the new FPGAs power high-speed transceivers and PCIe Gen4 that support 4K AV-over-IP, multi-stream capture, and frame-accurate transport for broadcast and remote production.
In high-throughput test and measurement scenarios, the increased memory bandwidth from AMD’s Kintex UltraScale+ Gen 2 lineup helps accelerate pattern generation, fail capture and timing-critical workloads across semiconductor test and inspection systems. In various advanced imaging and real-time control workflows, the FPGAs enhance scalable sensor connectivity, improving diagnostic clarity and responsiveness in machine vision, industrial automation, medical imaging and robotic systems.
Integrated LPDDR4X/5/5X controllers, with high DDR (Double Data Rate) bandwidth and programmable performance, allow designers to build systems that keep pace with rising data rates, while maintaining control over latency and power efficiency.
Increased Memory Bandwidth
Kintex UltraScale+ Gen 2 devices bring substantial increases in memory bandwidth compared to the previous generation, along with much higher channel density per PCIe interface. Making these improvements leads to higher throughput, lower latency and more responsive systems, without obliging users to resort to more expensive devices.
AMD has brought mid-range FPGA capabilities up to date to address growing bandwidth, timing precision and connectivity demands across markets. Compared to competing platforms, the new lineup delivers higher embedded RAM and DSP density and notably higher LPDDR memory bandwidth, while maintaining the security and lifecycle support needed for critical, regulated, and long-lived systems. Low-Power Double Data Rate (LPDDR) is a type of synchronous dynamic RAM (SDRAM) used in devices like smartphones, tablets and laptops requiring greater power efficiency than conventional memory, to extend battery life.
With scalable high-speed I/O, updated memory subsystems and programmable system behaviour, Kintex UltraScale+ Gen 2 FPGAs enable faster on-device processing and adaptable pipelines that can respond in real time while scaling to future throughput requirements.
Modern Security Features and Longevity
Many Kintex-based systems operate in environments where long product lifecycles, certification stability and consistent operation are critical for developers and end users. Serving these markets, Kintex UltraScale+ Gen 2 FPGAs integrate modern security capabilities directly into the device.
Features such as authenticated device operation, bitstream encryption, anti-cloning protections, secure key management and CNSA 2.0–grade cryptography help protect intellectual property and systems operating in distributed, connected and regulated environments.
Beyond security, the Kintex UltraScale+ Gen 2 FPGA is designed for longevity. With availability planned through at least 2045, the family brings the supply assurance that industrial, medical, broadcast and test equipment manufacturers depend on to support deployments for decades. It also means R&D teams can spend less time on redesign cycles and maintain regulatory certifications over time.
Equally important is development continuity. Because Kintex UltraScale+ Gen 2 devices are built on the existing AMD Vivado and Vitis tools and a mature portfolio of AMD video, Ethernet and connectivity IP, they give developers a stable, predictable path forward.
Developer Support
Simulation support for the Vivado and Vitis tools are scheduled for after mid 2026, which will give development teams early access to begin architecture exploration and design work.
Pre-production XC2KU050P FPGA silicon will follow, with sampling toward the end of 2026, enabling early hardware validation and performance characterisation, with production anticipated in the first half of 2027. A Kintex UltraScale+ Gen 2 evaluation kit, based on the XC2KU050P FPGA, will start sampling also in late 2026.
The existing Spartan UltraScale+ SCU200 Evaluation Kit, based on the migration-capable XCSU200P device, is available now for designers who want early hands-on experience with PCIe Gen4, hard memory controllers and the new security features.
AMD Kintex UltraScale+ Gen 2 FPGAs are being shown at Integrated Systems Europe (ISE) 2026 taking place on 3 – 7 February in Barcelona. www.amd.com
